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- [4] Clutter cancellation achievable with a digital waveform generator subjected to clock timing jitter IEEE National Radar Conference - Proceedings, 2000, : 428 - 434
- [5] Clutter cancellation achievable with a digital waveform generator subjected to clock timing jitter RECORD OF THE IEEE 2000 INTERNATIONAL RADAR CONFERENCE, 2000, : 428 - 434
- [8] Comparison between electrical and optical clock distribution for CMOS integrated circuits MICRO-OPTICS, VCSELS, AND PHOTONIC INTERCONNECTS, 2004, 5453 : 89 - 100
- [9] TIMING SIMULATION OF DIGITAL CMOS INTEGRATED-CIRCUITS USING ELSIM PROCEEDINGS OF THE 1989 SUMMER COMPUTER SIMULATION CONFERENCE, 1989, : 145 - 150