共 50 条
- [21] A Reconfigurable Architecture for 1-D and 2-D Discrete Wavelet Transform 2013 IEEE 21ST ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM), 2013, : 81 - 84
- [23] Efficient VLSI architecture for 2-D inverse discrete wavelet transforms ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 3: ANALOG AND DIGITAL SIGNAL PROCESSING, 1999, : 524 - 527
- [24] A Programmable Parallel VLSI Architecture for 2-D Discrete Wavelet Transform Journal of VLSI signal processing systems for signal, image and video technology, 2001, 28 : 151 - 163
- [25] Memory-Efficient Architecture of 2-D Discrete Wavelet Transform Hsi-An Chiao Tung Ta Hsueh/Journal of Xi'an Jiaotong University, 2022, 56 (01): : 177 - 183
- [26] A VLSI architecture for a fast computation of the 2-D discrete wavelet transform 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, 2007, : 3980 - 3983
- [27] A novel efficient VLSI architecture of 2-D discrete wavelet transform 2008 FOURTH INTERNATIONAL CONFERENCE ON INTELLIGENT INFORMATION HIDING AND MULTIMEDIA SIGNAL PROCESSING, PROCEEDINGS, 2008, : 647 - 650
- [29] A distributed memory and control architecture for 2-D discrete wavelet transform ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 3: ANALOG AND DIGITAL SIGNAL PROCESSING, 1999, : 387 - 390
- [30] A scalable pipelined architecture for separable 2-D discrete wavelet transform PROCEEDINGS OF ASP-DAC '99: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 1999, 1999, : 205 - 208