Analytical modeling and simulation of workfunction engineered gate junctionless high-k dielectric Double Gate MOSFET: A comparative study

被引:0
|
作者
Dept. of Electronics and Telecommunication Engineering, Jadavpur University, India [1 ]
机构
来源
IET Conf Publ | / CP683卷 / 428-432期
关键词
Engineering Village;
D O I
暂无
中图分类号
学科分类号
摘要
Analytical calculation - Double gate MOSFET - Effective oxide thickness - Junctionless - Model and simulation - Simplified expressions - Telecommunication engineering - Work function engineerings
引用
收藏
相关论文
共 50 条
  • [1] Analytical Modelling for nanoscale Gate Engineered Silicon-On-Nothing MOSFET with High-K dielectric
    Shora, Aadil Tahir
    Khanday, Farooq Ahmad
    PROCEEDINGS OF THE 3RD INTERNATIONAL CONFERENCE ON COMMUNICATION AND ELECTRONICS SYSTEMS (ICCES 2018), 2018, : 212 - 216
  • [2] Double Gate Junctionless MOSFET Simulation and Comparison with Analytical Model
    Zhang, Guang-Ming
    Su, Yi-Kai
    Hsin, Hsin-Yi
    Tsai, Yao-Tsung
    2013 IEEE REGIONAL SYMPOSIUM ON MICRO AND NANOELECTRONICS (RSM 2013), 2013, : 410 - 413
  • [3] Hafnium based high-k dielectric gate-stacked (GS) gate material engineered (GME) junctionless nanotube MOSFET for digital applications
    Raj Kumar
    Arvind Kumar
    Applied Physics A, 2021, 127
  • [4] Hafnium based high-k dielectric gate-stacked (GS) gate material engineered (GME) junctionless nanotube MOSFET for digital applications
    Kumar, Raj
    Kumar, Arvind
    APPLIED PHYSICS A-MATERIALS SCIENCE & PROCESSING, 2021, 127 (01):
  • [5] High-k Dielectric Double Gate Junctionless (DG-JL) MOSFET for Ultra Low Power Applications- Analytical Model
    Kumar, Prashant
    Vashishath, Munish
    Gupta, Neeraj
    Gupta, Rashmi
    SILICON, 2022, 14 (13) : 7725 - 7734
  • [6] High-k Dielectric Double Gate Junctionless (DG-JL) MOSFET for Ultra Low Power Applications- Analytical Model
    Prashant Kumar
    Munish Vashishath
    Neeraj Gupta
    Rashmi Gupta
    Silicon, 2022, 14 : 7725 - 7734
  • [7] Nanoscale channel engineered double gate MOSFET for mixed signal applications using high-k dielectric
    Nirmal, D.
    Vijayakumar, P.
    Shruti, K.
    Mohankumar, N.
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2013, 41 (06) : 608 - 618
  • [8] 2-D Analytical Modeling and Simulation of Dual Material, Double Gate, Gate Stack Engineered, Junctionless MOSFET based Biosensor with Enhanced Sensitivity
    Kumari, Monika
    Singh, Niraj Kumar
    Sahoo, Manodipan
    Rahaman, Hafizur
    SILICON, 2022, 14 (09) : 4473 - 4484
  • [9] 2-D Analytical Modeling and Simulation of Dual Material, Double Gate, Gate Stack Engineered, Junctionless MOSFET based Biosensor with Enhanced Sensitivity
    Monika Kumari
    Niraj Kumar Singh
    Manodipan Sahoo
    Hafizur Rahaman
    Silicon, 2022, 14 : 4473 - 4484
  • [10] Quantum mechanical modeling of MOSFET gate leakage for high-k gate dielectrics
    Wu, Huixian
    Zhao, Yijie Sandy
    White, Marvin H.
    SOLID-STATE ELECTRONICS, 2006, 50 (06) : 1164 - 1169