Wafer level chip-scale packaging: Evolving to meet a growing application space

Demand for Wafer level Chip-Scale Packaging (WLC-SP) is increasing due to growing number of applications such as in smart phones and tablets. WLC-SP is suitable for these mobile applications, as it offers the smallest die sized footprint along with robust board level test reliability. Majority of the mobile applications use WLCSP and 92% of all WLCSP packages are assembled into handsets. Widespread use of WLCSP for highly integrated wireless connectivity 'combo' chips has required development of processes and materials to extend the qualification range for WLCSP to larger die. This packaging technology is being used in devices with 7 mm/side, with I/O counts greater than 200. Analog and mixed signal applications also continue to represent a major portion of WLCSP demand, while connectivity devices are driving WLCSP on 300mm wafers at the 65nm technology node.