3-D through-silicon via technology

被引:0
|
作者
Vardaman, E. Jan [1 ]
机构
[1] TechSearch International, Inc.
来源
Electronic Device Failure Analysis | 2008年 / 10卷 / 04期
关键词
Field programmable gate arrays (FPGA) - Wafer bonding - Integrated circuit interconnects - Electronics packaging - Integrated circuit manufacture - Integration - Power amplifiers - Reactive ion etching - Silicon wafers;
D O I
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学科分类号
摘要
A 3-D Through-silicon via (TSV) integration is a system-level architecture or technology in which multiple layers of planar devices are stacked and interconnected through the silicon or other semiconductor material in the Z-direction. Applications for 3-D TSV include image sensors, flash, DRAM, processors, field-programmable gate arrays, and power amplifiers. The TSV can be inserted just before device fabrication, before the front end of line, or just after the devices have been fabricated. Processes in a 3-D integration sequence include through-wafer via formation, deep reactive ion etching (DRIE) or laser drilling, via filling by deposition of diffusion barrier and adhesion layers, metallization, etc. Thinning is one of the key operations in the 3-D integration process and one of the most potentially damaging process steps. Temporary bonding of 3-D wafers to temporary substrates is the accepted method for thinning wafers.
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页码:30 / 32
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