Combinational equivalence checking based on circuit topology analysis

被引：0
|
作者：
School of Information Engineering, Zhejiang Forestry College, Hangzhou 311300, China [1 ]
不详 [2 ]
机构：
来源：
Jisuanji Fuzhu Sheji Yu Tuxingxue Xuebao | 2008年 / 12卷 / 1557-1562期
关键词：
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：1557 / 1562
相关论文
共 50 条
  • [1] Improving SAT-Based Combinational Equivalence Checking Through Circuit Preprocessing
    Andrade, Fabricio Vivas
    Silva, Leandro M.
    Fernandes, Antonio O.
    2008 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, 2008, : 40 - +
  • [2] Combinational equivalence checking based on AIG reasoning
    Fan, Quan-Run
    Duan, Zhen-Hua
    Xu, Guo-Pei
    Xi'an Dianzi Keji Daxue Xuebao/Journal of Xidian University, 2009, 36 (05): : 877 - 884
  • [3] Improvements to combinational equivalence checking
    Mishchenko, Alan
    Chatterjee, Satrajit
    Brayton, Robert
    Een, Niklas
    IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN, DIGEST OF TECHNICAL PAPERS, ICCAD, 2006, : 90 - +
  • [4] Parallel Combinational Equivalence Checking
    Possani, Vinicius N.
    Mishchenko, Alan
    Ribas, Renato P.
    Reis, Andre I.
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 39 (10) : 3081 - 3092
  • [5] An FPGA based accelerator for SAT based combinational equivalence checking
    Safar, M
    El-Kharashi, MW
    Salem, A
    FIFTH INTERNATIONAL WORKSHOP ON SYSTEM-ON-CHIP FOR REAL-TIME APPLICATIONS, PROCEEDINGS, 2005, : 419 - 424
  • [6] Novel Probabilistic combinational equivalence checking
    Wu, Shih-Chieh
    Wang, Chun-Yao
    Chen, Yung-Chih
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2008, 16 (04) : 365 - 375
  • [7] Using SAT for combinational equivalence checking
    Goldberg, EI
    Prasad, MR
    Brayton, RK
    DESIGN, AUTOMATION AND TEST IN EUROPE, CONFERENCE AND EXHIBITION 2001, PROCEEDINGS, 2001, : 114 - 121
  • [8] The potential and limitation of probability-based combinational equivalence checking
    Wu, Shih-Chieh
    Wang, Chun-Yao
    Hsieh, Jan-An
    PROCEEDINGS OF THE 15TH ASIAN TEST SYMPOSIUM, 2006, : 103 - +
  • [9] Combinational equivalence checking through function transformation
    Kwak, HH
    Moon, IH
    Kukula, JH
    Shiple, TR
    IEEE/ACM INTERNATIONAL CONFERENCE ON CAD-02, DIGEST OF TECHNICAL PAPERS, 2002, : 526 - 533
  • [10] Robust latch mapping for combinational equivalence checking
    Burch, JR
    Singhal, V
    1998 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN: DIGEST OF TECHNICAL PAPERS, 1998, : 563 - 569
12345