Description method for high-level synthesis of histogram generation and their evaluation

被引：2

作者：

Yamasaki M. ^{[1
]}

Yamawaki A. ^{[1
]}

机构：

[1] Dept. of Electrical Engineering and Electronics, Kyushu Institute of Technology, Kitakyushu

来源：

IEIE Transactions on Smart Processing and Computing | 2019年 / 8卷 / 03期

关键词：

High performance; High-level synthesis; Histogram; Image processing; Low power;

D O I：

10.5573/IEIESPC.2019.8.3.178

中图分类号：

学科分类号：

摘要：

To achieve high performance and low power simultaneously in an embedded image-processing product, hardware implementation of high computational-software processing is needed. Hardware development, however, is a large burden on the developer. High-level synthesis (HLS) for automatically converting software into hardware can significantly reduce the design burden. To use HLS technology efficiently, a software program must be described considering the hardware organization that the HLS tool will generate. Histogram generation is one of the important basic functions in image processing. In histogram generation, data dependency on reading and writing to the same address in the histogram hinders ideal pipelining by an HLS tool. © 2019 Institute of Electronics and Information Engineers. All rights reserved.

引用

页码：178 / 185

页数：7

共 50 条

[31] Synthesis of High-Level Decision Diagrams for Functional Test Pattern Generation
Ubar, Raimund
Raik, Jaan
Karputkin, Anton
Tombak, Mati
MIXDES 2009: PROCEEDINGS OF THE 16TH INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2009, : 519 - +
[32] The application of high-level synthesis techniques for the generation of pipelined reprogrammable microcontrollers
Benmohammed, M
Rahmoune, A
Kission, P
ICECS 2000: 7TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS & SYSTEMS, VOLS I AND II, 2000, : 993 - 998
[33] Validating High-Level Synthesis
Kundu, Sudipta
Lerner, Sorin
Gupta, Rajesh
COMPUTER AIDED VERIFICATION, 2008, 5123 : 459 - 472
[34] OPTIMIZATIONS IN HIGH-LEVEL SYNTHESIS
ROSENSTIEL, W
MICROPROCESSING AND MICROPROGRAMMING, 1986, 18 (1-5): : 347 - 352
[35] HIGH-LEVEL SYNTHESIS - A TUTORIAL
WU, ACH
LIN, YL
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 1995, E78D (03) : 209 - 218
[36] ALGORITHMS FOR HIGH-LEVEL SYNTHESIS
PAULIN, PG
KNIGHT, JP
IEEE DESIGN & TEST OF COMPUTERS, 1989, 6 (06): : 18 - 31
[37] Introduction to high-level synthesis
Gajski, Daniel D.
Ramachandran, Loganath
IEEE Design and Test of Computers, 1600, 11 (04): : 44 - 54
[38] A new method for gene synthesis and its high-level expression
Cao, Shi-shu
Hu, Zhi-qiu
JOURNAL OF MICROBIOLOGICAL METHODS, 2009, 79 (01) : 106 - 110
[39] A high-level synthesis method for weakly testable data baths
Inoue, M
Higashimura, T
Noda, K
Masuzawa, T
Fujiwara, H
SEVENTH ASIAN TEST SYMPOSIUM (ATS'98), PROCEEDINGS, 1998, : 40 - 45
[40] A SCHEDULING METHOD USING BOOLEAN EQUATIONS IN HIGH-LEVEL SYNTHESIS
MIYAZAKI, T
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 1992, E75A (12) : 1728 - 1731

← 1 2 3 4 5 →