RISC-V based SoC Platform for Neural Network Acceleration

被引:1
|
作者
Rodriguez, Nicolas [1 ,3 ]
Gigena Ivanovich, Diego [1 ,3 ]
Villemur, Martin [1 ]
Julian, Pedro [2 ,3 ]
机构
[1] Silicon Austria Labs, Altenberger Str 66c, Linz, Austria
[2] Univ Nacl Sur IIIE DIEC, RA-800 Bahia Blanca, Buenos Aires, Argentina
[3] JKU LIT SAL eSPML Lab, Bahia Blanca, Buenos Aires, Argentina
关键词
Neuromorphic Computing; Neural Network Accelerators; Digital Architectures;
D O I
10.1109/CAE59785.2024.10487148
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The increasing demand of intelligent devices on resource constrained platforms requires neuromorphic accelerators that can compute several and complex operations while being low power and energy efficient. Symmetric Simplicial operations have compact and low power hardware implementations, making them promising solution to the trade-off between energy efficiency and computational power. This paper presents DIGINEURON V2, the latest System on Chip (SoC) fabricated within the internal research project DIGINEURON that works as a testbed for Neuromorphic Deep Neural Network cores. DIGINEURON V2 is a 1.25x1.25 mm(2) chip in TSMC 65nm CMOS technology, and presents an AMBA AHB 64-bit bus, an open source RISC-V 32bit processor, and 32KB SRAM, among other peripherals such as interfaces, DMA controller, and an improved version of the Channel-wise Symmetric Simplicial (SymSim) accelerator. This new iteration achieves better power/energy efficiency compared to the previous prototype because of clock gating techniques, the new peripherals and improved SymSim engine.
引用
收藏
页码:142 / 147
页数:6
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