A DESIGN OF 0.25μm CMOS SWITCH

被引：0

作者：

Han Lei Yang Tao Xie Jun Wang Yong You Yu Zhang Bo Chengdu Goldtel Microelectronics Co Ltd Chengdu China School of Microelectronics and SolidState Electronics University of Electronic Science Technology of China Chengdu China ^{[611731
,610054
]}

机构：

来源：

Journal of Electronics | 2006年 / 05期

关键词：

D O I：

暂无

中图分类号：

TN432 [场效应型];

学科分类号：

摘要：

Single-Pole Double-Throw (SPDT) broadband switch has been designed in a 0.25μm Comple- mentary Metal Oxide Semiconductor (CMOS) process. To optimize the performance of isolation and insertion loss, based on normal design, the effects of Gate Series Resistances (GSR) on insertion loss and switching time are analyzed for the first time. The compatible GSRs are chosen by the analyses. The fabricated chips were tested and the results show the switch isolation from DC (Direct Current) to 1GHz exhibits 55dB and insertion loss lower than 2.1dB.

引用

页码：745 / 747

页数：3

共 50 条

[21] Analysis and Design of High Performance Analog Switch Circuit Based on 0.25 μm BCD Process
Peng, Duocai
Jin, Xiangliang
CIRCUITS SYSTEMS AND SIGNAL PROCESSING, 2023, 42 (04) : 1893 - 1910
[22] 0.25 mu m CMOS/SIMOX device technology
Tsuchiya, T
Ohno, T
Kado, Y
Nakashima, S
NTT REVIEW, 1997, 9 (04): : 78 - 87
[23] SOI technology for sub-0.25 μm CMOS
Maszara, W.P.
Electron Technology (Warsaw), 1999, 32 (01): : 16 - 20
[24] Profile analysis of a 0.25 mu m CMOS process
Current, MI
Castle, M
Chia, V
Mount, G
Weinzierl, S
Prussin, S
Larson, L
ION IMPLANTATION TECHNOLOGY - 96, 1997, : 194 - 197
[25] Technologies for 0.25 mu m CMOS logic devices
Katsube, M
Izawa, T
FUJITSU SCIENTIFIC & TECHNICAL JOURNAL, 1996, 32 (01): : 94 - 101
[26] Transceiver Chip Design in High Voltage 0.25μm CMOS Technology for Magnetic Resonance System
Hsu, Heng-Ming
Chien, Chun-Tsai
Wu, Dien-Ying
2015 IEEE Wireless Power Transfer Conference (WPTC), 2015,
[27] Design of a 0.25-μm CMOS 5.25GHz transceiver front-end
Jou, CF
Huang, PR
Cheng, KH
ICECS 2003: PROCEEDINGS OF THE 2003 10TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3, 2003, : 1090 - 1093
[28] Design of negative charge pump circuit with polysilicon diodes in a 0.25-μm CMOS process
Ker, MD
Chang, CY
Jiang, HC
2002 IEEE ASIA-PACIFIC CONFERENCE ON ASIC PROCEEDINGS, 2002, : 145 - 148
[29] Simulation of 0.35 μm/0.25 μm CMOS technology doping profiles
Lorenzini, M
Haspeslagh, L
Van Houdt, J
Maes, HE
VLSI DESIGN, 2001, 13 (1-4) : 459 - 463
[30] A 0.25-mm CMOS T/R switch for UWB wireless communications
Jin, YL
Nguyen, C
IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2005, 15 (08) : 502 - 504

← 1 2 3 4 5 →