共 50 条
- [1] FAULT-TOLERANT HEXAGONAL ARITHMETIC ARRAY PROCESSORS MICROPROCESSING AND MICROPROGRAMMING, 1988, 24 (1-5): : 629 - 636
- [2] OPTIMUM DESIGN OF FAULT-TOLERANT ARITHMETIC ARRAY PROCESSORS BY USING DATA CODING MICROPROCESSING AND MICROPROGRAMMING, 1989, 27 (1-5): : 697 - 704
- [3] Dynamic Fault-tolerant Design for Array Processors Based on Immunology 2ND IEEE INTERNATIONAL CONFERENCE ON ADVANCED COMPUTER CONTROL (ICACC 2010), VOL. 5, 2010, : 16 - 20
- [4] Optimal fault-tolerant design approach for VLSI array processors IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 1997, 144 (01): : 15 - 21
- [9] Fault-Tolerant Deployment of Dataflow Applications Using Virtual Processors 2018 21ST EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD 2018), 2018, : 77 - 84
- [10] On the Criticality of Caches in Fault-Tolerant Processors for Space 2019 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI AND NANOTECHNOLOGY SYSTEMS (DFT), 2019,