共 50 条
- [1] FAULT-TOLERANT HEXAGONAL ARITHMETIC ARRAY PROCESSORS MICROPROCESSING AND MICROPROGRAMMING, 1988, 24 (1-5): : 629 - 636
- [2] Dynamic Fault-tolerant Design for Array Processors Based on Immunology 2ND IEEE INTERNATIONAL CONFERENCE ON ADVANCED COMPUTER CONTROL (ICACC 2010), VOL. 5, 2010, : 16 - 20
- [3] Optimal fault-tolerant design approach for VLSI array processors IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 1997, 144 (01): : 15 - 21
- [6] Design of a fault-tolerant arithmetic circuit based on distributed coding and its evaluation Kasuga, Takeshi, 1600, (21):
- [7] An integrated fault-tolerant design framework for VLIW processors 18TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, 2003, : 555 - 562
- [8] Towards Fault-tolerant Design of Quaternary Quantum Arithmetic 8TH INTERNATIONAL TEST CONFERENCE IN ASIA, ITC-ASIA 2024, 2024,