A 10-B 50 MS/S 500-MW A/D CONVERTER USING A DIFFERENTIAL-VOLTAGE SUBCONVERTER

被引:0
|
作者
MIKI, T
KOUNO, H
KUMAMOTO, T
KINOSHITA, Y
IGARASHI, T
OKADA, K
机构
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A BiCMOS A/D converter using a ''differential voltage subconverter,'' which directly converts a voltage difference of complementary analog inputs to a digital code, is described. Fully differential architecture has advantages in immunity of common-mode error and in reduction of supply voltage. This differential-voltage subconverter realizes the fully differential A/D conversion without using interpolation technique. This subconverter is free from CR delay caused in the ladder resistors. Circuit techniques for high-accuracy conversion with single 5-V power supply, such as compensation technique for VBE modulation in emitter degeneration amplifier, are also described. A 10-b A/D converter is fabricated in a 0.8-mum BiCMOS process with f(T) of 9 GHz. It successfully operates at 50 MS/s with 500-mW power consumption and with 5-V single supply.
引用
收藏
页码:846 / 852
页数:7
相关论文
共 50 条
  • [31] A 10 bit, 2Ms/s, 15mW BiCMOS cyclic RSD A/D converter
    Garrity, D
    Rakers, P
    PROCEEDINGS OF THE 1996 BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING, 1996, : 192 - 195
  • [32] A Single-Channel 10-b 400-MS/s 8.7-mW Pipeline ADC in a 90-nm Technology
    Hsu, Chen-Kai
    Lee, Tai-Cheng
    2015 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC), 2015, : 233 - 236
  • [33] An 8mW 10b 50MS/s Pipelined ADC Using 25dB Opamp
    Kim, Min Gyu
    Kratyuk, Volodymyr
    Hanumolu, Pavan Kumar
    Alm, Gil-Cho
    Kwon, Sunwoo
    Moon, Un-Ku
    2008 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE, 2008, : 49 - +
  • [34] A 8b 10Ms/s low power pipelined A/D converter
    Yuan, Bi
    Zhang, Yi
    He, Lili
    ISQED 2007: PROCEEDINGS OF THE EIGHTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, 2007, : 225 - +
  • [35] A 10-b 2b/cycle 300MS/s SAR ADC with a Single Differential DAC in 40nm CMOS
    Song, Jeonggoo
    Tang, Xiyuan
    Sun, Nan
    2017 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2017,
  • [36] A 10 BIT 50 MS/S CMOS D/A CONVERTER WITH 2.7-V POWER-SUPPLY
    MIKI, T
    NAKAMURA, Y
    NISHIKAWA, Y
    OKADA, K
    HORIBA, Y
    IEICE TRANSACTIONS ON ELECTRONICS, 1993, E76C (05) : 738 - 744
  • [37] AN 8-BIT 20-MS/S CMOS A/D CONVERTER WITH 50-MW POWER-CONSUMPTION
    HOSOTANI, S
    MIKI, T
    MAEDA, A
    YAZAWA, N
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (01) : 167 - 172
  • [38] An 8b 600MS/s 200mW CMOS folding A/D converter using an amplifier preset technique
    Geelen, G
    Paulus, E
    2004 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, DIGEST OF TECHNICAL PAPERS, 2004, 47 : 254 - 255
  • [39] A WIDE-BAND 10-B 20-MS/S PIPELINED ADC USING CURRENT-MODE SIGNALS
    REAL, P
    ROBERTSON, DH
    MANGELSDORF, CW
    TEWKSBURY, TL
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1991, 26 (08) : 1103 - 1109
  • [40] A 10-b 80Ms/s time-interleaved pipeline ADC using partially opamp sharing scheme
    Cao Junmin
    Chen Zhongjian
    Lu Wengao
    Zhao Baoying
    ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2007, : 257 - 260