STRUCTURE OF PARALLEL MULTIPLIERS FOR A CLASS OF FIELDS GF(2M)

被引：146

|

作者：

ITOH, T

TSUJII, S

机构：

来源：

INFORMATION AND COMPUTATION | 1989年 / 83卷 / 01期

关键词：

D O I：

10.1016/0890-5401(89)90045-X

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

引用

收藏

页码：21 / 40

页数：20

相关论文

共 50 条

[21] MODULAR CONSTRUCTION OF LOW COMPLEXITY PARALLEL MULTIPLIERS FOR A CLASS OF FINITE-FIELDS GF(2(M))
HASAN, MA
WANG, MZ
BHARGAVA, VK
IEEE TRANSACTIONS ON COMPUTERS, 1992, 41 (08) : 962 - 971
[22] A novel architecture for Galois fields GF(2m) multipliers based on Mastrovito scheme
Petra, Nicola
De Caro, Davide
Strollo, Antonio G. M.
IEEE TRANSACTIONS ON COMPUTERS, 2007, 56 (11) : 1470 - 1483
[23] Bit-parallel systolic multipliers for GF(2m) fields defined by all-one and equally spaced polynomials
Lee, CY
Lu, EH
Lee, JY
IEEE TRANSACTIONS ON COMPUTERS, 2001, 50 (05) : 385 - 393
[24] Multiplexer-based bit-parallel systolic multipliers over GF(2m)
Lee, Chiou-Yng
COMPUTERS & ELECTRICAL ENGINEERING, 2008, 34 (05) : 392 - 405
[25] Partition algorithm for parallel processing of array multiplication in GF(2m) fields
Chiou, CW
INTERNATIONAL JOURNAL OF COMPUTER MATHEMATICS, 2003, 80 (07) : 805 - 809
[26] Efficient testable bit parallel multipliers over GF(2m) with constant test set
Mathew, J.
Rahaman, H.
Pradhan, D. K.
13TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM PROCEEDINGS, 2007, : 207 - +
[27] Low-complexity bit-parallel systolic multipliers over GF(2m)
Chiou-Yng Lee
Chin-Chin Chen
Yuan-Ho Chen
Erl-Huei Lu
2006 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN, AND CYBERNETICS, VOLS 1-6, PROCEEDINGS, 2006, : 1160 - 1165
[28] Low-complexity modified Mastrovito multipliers over finite fields GF(2M)
Song, LL
Parhi, KK
ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI, 1999, : 508 - 512
[29] A basis-independent algorithm to design fast parallel multipliers over GF(2m)
Elia, M
Leone, M
ITCC 2004: INTERNATIONAL CONFERENCE ON INFORMATION TECHNOLOGY: CODING AND COMPUTING, VOL 2, PROCEEDINGS, 2004, : 553 - 559
[30] Derivation of reduced test vectors for bit-parallel multipliers over GF(2m)
Rahaman, H.
Mathew, J.
Pradhan, D. K.
Jabir, A. M.
IEEE TRANSACTIONS ON COMPUTERS, 2008, 57 (09) : 1289 - 1294

← 1 2 3 4 5 →