共 50 条
- [21] Two-step optoelectronic quaternary signed-digit adder using optical correlation OPTICS AND LASER TECHNOLOGY, 1998, 30 (6-7): : 377 - 390
- [22] Negabinary Signed-Digit Adder: All-Optical Polarization-Encoded Design 2013 2ND INTERNATIONAL CONFERENCE ON ADVANCES IN ELECTRICAL ENGINEERING (ICAEE 2013), 2013, : 142 - 145
- [23] CONDITIONAL SYMBOLIC MODIFIED SIGNED-DIGIT ARITHMETIC USING OPTICAL CONTENT-ADDRESSABLE MEMORY LOGIC ELEMENTS APPLIED OPTICS, 1987, 26 (12): : 2328 - 2333
- [24] OPTICAL MODIFIED SIGNED-DIGIT ADDITION BASED ON BINARY LOGICAL OPERATIONS OPTICS AND LASER TECHNOLOGY, 1994, 26 (04): : 213 - 217
- [25] Comparison of a Binary Signed-Digit Adder with Conventional Binary Adder Circuits on Layout Level ARCHITECTURE OF COMPUTING SYSTEMS, ARCS 2024, 2024, 14842 : 237 - 249
- [26] MODIFIED-SIGNED DIGIT ARITHMETIC USING AN EFFICIENT SYMBOLIC SUBSTITUTION APPLIED OPTICS, 1988, 27 (18): : 3824 - 3827
- [27] Incorporating area-time flexibility to a Binary Signed-Digit adder APCCAS 2002: ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 1, PROCEEDINGS, 2002, : 485 - 489
- [29] Compact signed-digit adder using multiple-valued logic SEVENTEENTH CONFERENCE ON ADVANCED RESEARCH IN VLSI, PROCEEDINGS, 1997, : 96 - 113
- [30] Design and synthesis of a carry-free signed-digit decimal adder 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, 2007, : 1089 - 1092