THE DESIGN OF A BIT-SERIAL COPROCESSOR TO PERFORM MULTIPLICATION AND DIVISION ON A MASSIVELY PARALLEL ARCHITECTURE

被引：0
|
作者：
MORLEY, RE
CHRISTENSEN, GE
SULLIVAN, TJ
机构：
来源：
SYSTOLIC ARRAY PROCESSORS | 1989年
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D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
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页码：497 / 503
页数：7
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