RELIABILITY-ANALYSIS AND DESIGN OF A FAULT-TOLERANT RANDOM-ACCESS MEMORY SYSTEM

被引：2
|
作者：
KONTOLEON, JM
STERGIOU, A
机构：
[1] Department of Electrical Engineering, University of Thessaloniki, Thessaloniki
来源：
MICROELECTRONICS AND RELIABILITY | 1991年 / 31卷 / 06期
关键词：
D O I：
10.1016/0026-2714(91)90288-I
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The design of a modular RAM system which is organized in a number of memory cards is examined. Two important factors are taken into account: the size of the memory chips used in a particular memory design, and the number of memory partitions which gives the maximum memory system reliability. Expressions are derived for three memory designs using two extreme failure models for the memory chips. These provide upper and lower bounds for the card and the entire memory system reliability, and allow the selection of an optimal configuration for a memory system which has a specified capacity and word length with (1) SEC or (2) SED-DED codes with spare memory cards.
引用
收藏
页码：1063 / 1067
页数：5
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