ELECTRON TRAPPING INSTABILITIES IN POLYCRYSTALLINE SILICON THIN-FILM TRANSISTORS

被引：21
|
作者：
YOUNG, ND
GILL, A
机构：
[1] Philips Res. Labs., Redhill, Surrey, Cross Oak Lane
来源：
SEMICONDUCTOR SCIENCE AND TECHNOLOGY | 1990年 / 5卷 / 01期
关键词：
D O I：
10.1088/0268-1242/5/1/010
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The stability of polycrystalline silicon thin film transistors formed at low temperatures has been studied. Charge trapping in the deposited gate oxide is observed over a wide range of conditions. At high gate biases this is due to the passage of a tunnel current, and at lower biases to direct tunnelling into the traps. Trap concentrations, cross sections and energy levels have been deduced based upon a simple trapping model, and an empirical device lifetime model is presented.
引用
收藏
页码：72 / 77
页数：6
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