共 37 条
- [21] Application of design of experiments methodology to model the effect of multiple parameters on simultaneous switching noise 52ND ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2002 PROCEEDINGS, 2002, : 79 - 85
- [24] Low power design for the output-driver circuit of integrated Bi-coms DC/DC switching regulator controller 2001, Southeast University (24):
- [25] A Gate Driver Circuit Design for SiC MOSFET based Three Level NPC Inverter with Reduced High Frequency Switching Noise 2017 NATIONAL POWER ELECTRONICS CONFERENCE (NPEC), 2017, : 185 - 190
- [27] Evaluation and design trade-offs between circuit-switched and packet-switched NOCs for application-specific SOCs 43RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2006, 2006, : 143 - 148
- [28] New simultaneous switching noise analysis and modeling for high-speed and high-density CMOS IC package design IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2000, 23 (02): : 303 - 312
- [29] Chip-level performance maximization using ASIS (Application-specific Interconnect Structure) wiring design concept for 45 nm CMOS devices IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2005, TECHNICAL DIGEST, 2005, : 1045 - 1048