CAMELEON - A PROCESS-TOLERANT SYMBOLIC LAYOUT SYSTEM

被引：6

作者：

CROES, K ^{[1
]}

DEMAN, HJ ^{[1
]}

SIX, P ^{[1
]}

机构：

[1] CATHOLIC UNIV LEUVEN,ESAT LAB,B-3030 HEVERLE,BELGIUM

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1988年 / 23卷 / 03期

关键词：

CAMELEON - PROCESS TOLERANT SYSTEM - SYMBOLIC LAYOUT SYSTEM;

D O I：

10.1109/4.309

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：705 / 713

页数：9

共 50 条

[41] GENERAL LAYOUT OF DYNAMIC CONTROL SYSTEM FOR LD PROCESS
BOZZA, G
COSTA, B
METALLURGIA ITALIANA, 1969, 61 (03): : 97 - &
[42] DEF ECT TOLERANT LAYOUT SYNTHESIS
ORAILOGLU, A
KARRI, R
INTERNATIONAL JOURNAL OF ELECTRONICS, 1994, 76 (06) : 1121 - 1133
[43] SGRED - A SYMBOLIC GRAPHICS EDITOR FOR VLSI LAYOUT
TANEJA, S
SCHUYLER, ST
WANG, S
ANGELINA, HM
1989 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3, 1989, : 33 - 38
[44] FROM LOGIC TO SYMBOLIC LAYOUT FOR GATE MATRIX
SINGH, U
CHEN, CYR
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1992, 11 (02) : 216 - 227
[45] SYMBOLIC LAYOUT SPEEDS MOS IC DESIGN
STENGEL, RF
DESIGN NEWS, 1979, 35 (14) : 57 - 58
[46] SYMBOLIC LAYOUT SOFTWARE ACCELERATES IC DESIGN
LIAO, YZ
CHEN, NP
GAU, T
ELECTRONIC DESIGN, 1986, 34 (13) : 89 - &
[47] ON FAULT-TOLERANT SYMBOLIC COMPUTATIONS
DELYON, B
MALER, O
LECTURE NOTES IN COMPUTER SCIENCE, 1991, 571 : 259 - 269
[48] THE VICTIMS IN THE PROCESS OF JUSTICE AND PEACE The symbolic character of truth, justice and reparation in the transition to tolerant coexistence
Barreto Ardila, Hernando
DERECHO PENAL Y CRIMINOLOGIA, 2009, 30 (89): : 17 - 36
[49] Layout-aware analog system synthesis based on symbolic layout description and combined block parameter exploration, placement and global routing
Tang, H
Zhang, H
Doboli, A
ISVLSI 2003: IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, PROCEEDINGS: NEW TRENDS AND TECHNOLOGIES FOR VLSI SYSTEMS DESIGN, 2003, : 266 - 271
[50] The symbolic process
Hunter, WS
PSYCHOLOGICAL REVIEW, 1924, 31 (06) : 478 - 497

← 1 2 3 4 5 →