A survey of circuit-level soft error mitigation methodologies

被引：0
|
作者：
Selahattin Sayil
机构：
[1] Lamar University,Electrical Engineering
来源：
Analog Integrated Circuits and Signal Processing | 2019年 / 99卷
关键词：
Single event transients; Combinational logic; Soft error mitigation; Radiation hardening by design;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
Soft errors created due to propagation of single event transients are a significant reliability challenge in modern VLSI. With advances in CMOS technology scaling, circuits become increasingly more sensitive to transient pulses caused by energetic particles. This work reviews some popular circuit level SET mitigation techniques developed for combinational logic and compares them with respect to area, power and delay overheads.
引用
收藏
页码：63 / 70
页数：7
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