Modeling of short geometry polycrystalline-silicon thin-film transistor

被引：0
|
作者：
Chopra, S
Gupta, RS
机构：
[1] Univ Delhi, Dept Elect Sci, New Delhi 110021, India
[2] Acharya Narendra Dev Coll, Dept Phys, New Delhi 110019, India
来源：
IEEE TRANSACTIONS ON ELECTRON DEVICES | 2000年 / 47卷 / 12期
关键词：
grain boundary; poly-Si; short geometry effect;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An accurate model for the device characteristics of a short geometry polysilicon thin-film transistor (poly-Si TFT) is developed. The proposed channel length dependent threshold voltage and the current-voltage (I-V) characteristics determined are in excellent agreement with experimental results confirming the validity of this model. The impact of the grain size on device characteristics is also shown.
引用
收藏
页码：2444 / 2446
页数：3
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