A Digital Calibration Technique for DAC Mismatches in Delta-Sigma Modulators

被引:3
|
作者
Yu, Wenhuan [1 ]
Temes, Gabor C. [1 ]
机构
[1] Oregon State Univ, Dept EECS, Corvallis, OR 97331 USA
关键词
D O I
10.1109/ISCAS.2009.5118011
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A digital calibration technique is proposed for DAC mismatches in delta-sigma (Delta Sigma) modulators. The delta-sigma modulator works as an incremental ADC in the calibration mode. The DAC mismatches are found by solving linear equations and are compensated digitally. The technique can be used in double-sampling delta-sigma modulators as well.
引用
收藏
页码:1337 / 1340
页数:4
相关论文
共 50 条
  • [31] Double sampling delta-sigma modulators
    Yang, HK
    ElMasry, EI
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1996, 43 (07): : 524 - 529
  • [32] Sensitivity analysis of delta-sigma modulators
    Raahemi, B
    Opal, A
    1997 CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING, CONFERENCE PROCEEDINGS, VOLS I AND II: ENGINEERING INNOVATION: VOYAGE OF DISCOVERY, 1997, : 110 - 113
  • [33] Power-On Digital Calibration Method for Delta-Sigma ADCs
    Cao, Jinzhou
    Meng, Xin
    Temes, Gabor C.
    Yu, Wenhuan
    2016 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2016, : 2002 - 2005
  • [34] Recent advances in the analysis, design and optimization of Digital Delta-Sigma Modulators
    Kennedy, Michael Peter
    IEICE NONLINEAR THEORY AND ITS APPLICATIONS, 2012, 3 (03): : 258 - 286
  • [35] Architectures for Maximum-Sequence-Length Digital Delta-Sigma Modulators
    Hosseini, Kaveh
    Kennedy, Michael Peter
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2008, 55 (11) : 1104 - 1108
  • [36] Background calibration of integrator leakage in discrete-time delta-sigma modulators
    Su-Hao Wu
    Jieh-Tsorng Wu
    Analog Integrated Circuits and Signal Processing, 2014, 81 : 645 - 655
  • [37] Background calibration of integrator leakage in discrete-time delta-sigma modulators
    Wu, Su-Hao
    Wu, Jieh-Tsorng
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2014, 81 (03) : 645 - 655
  • [38] Background Calibration of Integrator Leakage in Discrete-Time Delta-Sigma Modulators
    Wu, Su-Hao
    Wu, Jieh-Tsorng
    2013 IEEE 11TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 2013,
  • [39] Mismatch-shaping DAC for lowpass and bandpass multi-bit delta-sigma modulators
    Shui, T
    Schreier, R
    Hudson, F
    ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6, 1998, : 352 - 355
  • [40] An Extremely Linear Multi-Level DAC for Continuous-Time Delta-Sigma Modulators
    Zhang, Yang
    He, Xiaoyong
    Pun, Kong-Pang
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2019, 66 (03) : 367 - 371