Application of combinatorial methodologies for work function engineering of metal gate/high-κ advanced gate stacks

被引：9

作者：

Green, M. L. ^{[1
]}

Chang, K.-S.

DeGendt, S.

Schram, T.

Hattrick-Simpers, J.

机构：

[1] Natl Inst Stand & Technol, Gaithersburg, MD 20899 USA

[2] Katholieke Univ Leuven, Dept Chem, Louvain, Belgium

[3] IMEC, B-3001 Louvain, Belgium

[4] Univ Maryland, College Pk, MD 20740 USA

来源：

MICROELECTRONIC ENGINEERING | 2007年 / 84卷 / 9-10期

关键词：

metal gate electrodes; CMOS; advanced gate stack; combinatorial methodologies;

D O I：

10.1016/j.mee.2007.04.128

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper uses combinatorial methodologies to investigate the effect of TaN-AlN metal gate electrode composition on the work function, for (TaN-AlN)/Hf-Si-O/SiO2/Si capacitors. We demonstrate the efficacy of the combinatorial technique by plotting work function for more than thirty Ta1-xAlxNy compositions, with x varying from 0.05 to 0.50. The work function is shown to continuously decrease, from about 4.9 to about 4.7 eV, over this range. Over the same range, oxide fixed charge is seen to go from about -2.5 x 10(12) cm(-3) to about zero. The work functions reported here are about 0.1 eV higher than in a previous study, but are still about 0.2 eV smaller than required for PMOS device applications.

引用

页码：2209 / 2212

页数：4

共 50 条

[21] Effective work function engineering by lanthanide ion implantation of metal-oxide semiconductor gate stacks
Fet, A.
Haeublein, V.
Bauer, A. J.
Ryssel, H.
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 2009, 27 (01): : 290 - 293
[22] Study of Work-Function Variation in High-κ/Metal-Gate Gate-All-Around Nanowire MOSFET
Nam, Hyohyun
Lee, Youngtaek
Park, Jung-Dong
Shin, Changhwan
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2016, 63 (08) : 3338 - 3341
[23] Carrier scattering by workfunction fluctuations and interface dipoles in high-κ/metal gate stacks
Zeng, Zaiping
Triozon, Francois
Niquet, Yann-Michel
2016 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD), 2016, : 369 - 372
[24] AR-HPES study on chemical bonding states of high-κ/high-μ gate stacks for advanced CMOS
Nohira, H.
Komatsu, A.
Yamashita, K.
Kakushima, K.
Iwai, H.
Sawano, K.
Shiraki, Y.
JOURNAL OF ELECTRON SPECTROSCOPY AND RELATED PHENOMENA, 2013, 190 : 295 - 301
[25] Reliability Assessment of Low |Vt| Metal High-κ Gate Stacks for High Performance Applications
Young, C. D.
Bersuker, G.
Khanal, P.
Kang, C. Y.
Huang, J.
Park, C. S.
Kirsch, P.
Tseng, H. -H.
Jammy, R.
PROCEEDINGS OF TECHNICAL PROGRAM: 2009 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS, 2009, : 65 - 66
[26] Impact of Post Metal Annealing on Gate Work Function Engineering for Advanced MOS Applications
Kumar, S. Sachin
Prasad, Arnitesh
Sinha, Amrita
Raut, Pratikhya
Das, Palash
Mahato, S. S.
Mallik, S.
INTERNATIONAL CONFERENCE ON CONDENSED MATTER AND APPLIED PHYSICS (ICC 2015), 2016, 1728
[27] Interface dipole engineering in metal gate/high-k stacks
Huang AnPing
Zheng XiaoHu
Xiao ZhiSong
Wang Mei
Di ZengFeng
Chu, Paul K.
CHINESE SCIENCE BULLETIN, 2012, 57 (22): : 2872 - 2878
[28] Interface dipole engineering in metal gate/high-k stacks
CHU Paul K
Chinese Science Bulletin, 2012, 57 (22) : 2872 - 2878
[29] Performance and reliability of advanced High-K/Metal gate stacks
Garros, X.
Casse, M.
Reimbold, G.
Rafik, M.
Martin, F.
Andrieu, F.
Cosnier, V.
Boulanger, F.
MICROELECTRONIC ENGINEERING, 2009, 86 (7-9) : 1609 - 1614
[30] Gate stack engineering to enhance high-κ/metal gate reliability for DRAM I/O applications
O'Sullivan, B. J.
Ritzenthaler, R.
Simoen, E.
Litta, E. Dentoni
Schram, T.
Chasin, A.
Linten, D.
Horiguchi, N.
Machkaoutsan, V.
Fazan, P.
Ji, Y.
2017 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2017,

← 1 2 3 4 5 →