Impact of Post Metal Annealing on Gate Work Function Engineering for Advanced MOS Applications

Ultra thin HfO2 high-k gate dielectric has been deposited directly on strained Si0.81Ge0.19 by Atomic Layer Deposition (ALD) technique. The influence of different types of metal gate electrodes (Al, Au, Pt) on electrical characteristics of Metal-Oxide-Semiconductor capacitors has been studied. Our results show that the electrical characteristics of MOS device are highly dependent on the gate electrodes used. The dependency of electrical characteristics on post metal annealing was studied in detail. The measured flat band (V-fb) and hysteresis (Delta V-fb) from high frequency C-V characteristics were used to study the pre-existing traps in the dielectric. Impact of PMA on interface state density (D-it), border trap density (N-bt) and oxide trap density (Q(f)/(q)) of high-k gate stack were also examined for all the devices. The N-bt and frequency dispersion significantly reduces to similar to 2.77x10(10) cm(-2) and similar to 11.34 % respectively in case of Al electrode with a D-it value of similar to 4x10(12) eV(-1)cm(-2) after PMA (350 degrees C) in N-2, suggesting an improvement in device perfonnance while Pt electrode shows a much less value of Delta V-fb (similar to 0.02 V) and D-it (similar to 3.44x10(12) eV(-1)cm(-2)) after PMA.