Numerical evaluation of thermal cycling reliability of high performance flip-chip package assembly using submodeling analysis

被引：4
|
作者：
Kao, Chin-Li [1 ]
Lai, Yi-Shao [1 ]
Wang, Tong Hong [1 ]
机构：
[1] Adv Semicond Engn Inc, Stress Reliabil lab, Kaohsiung 811, Taiwan
来源：
JOURNAL OF THE CHINESE INSTITUTE OF ENGINEERS | 2007年 / 30卷 / 02期
关键词：
submodeling; finite element analysis; thermal cycling; high-performance flip-chip package;
D O I：
10.1080/02533839.2007.9671262
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
This paper applies the submodeling technique in analyzing thermal cycling reliability of high performance flip-chip ball grid array package assemblies. The packages have one-piece tunnel-type heat spreaders with different lead widths, connected to chips using different thermal interface materials. The global model contains no solder bumps to simplify the analysis. The calculated displacement field of the global model is then interpolated on the boundary of the submodel that contains the critical solder bump. The submodel is solved using the prescribed displacement boundary conditions together with external thermal loads to evaluate thermomechanical reliability of the critical solder bump.
引用
收藏
页码：349 / 352
页数：4
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