共 50 条
- [21] A novel technique for noise-tolerance in dynamic circuits ISVLSI 2003: IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, PROCEEDINGS: NEW TRENDS AND TECHNOLOGIES FOR VLSI SYSTEMS DESIGN, 2003, : 203 - 206
- [22] Dynamic and Noise Properties of PLL Circuits in GNSS Receivers 2019 SYSTEMS OF SIGNAL SYNCHRONIZATION, GENERATING AND PROCESSING IN TELECOMMUNICATIONS (SYNCHROINFO), 2019,
- [23] DOMINO noise model: A new crosstalk noise model for dynamic logic circuits IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS, 2003, : 207 - 210
- [25] Noise Analysis of Non-Linear Dynamic Integrated Circuits IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE 2010, 2010,
- [27] GENERALIZED EFFECT OF DYNAMIC SUPPRESSION OF NOISE FOR THE RESONANCE MEASURING CIRCUITS VESTNIK MOSKOVSKOGO UNIVERSITETA SERIYA 3 FIZIKA ASTRONOMIYA, 1988, 29 (06): : 13 - 16
- [28] New Noise Tolerance Improvement Techniques for Dynamic Logic Circuits JOURNAL OF ACTIVE AND PASSIVE ELECTRONIC DEVICES, 2013, 8 (01): : 65 - 77
- [29] Application of the nonlinear filtering algorithm with a correlation noise in the dynamic positioning Jiao, Yu-Zhao (jiaoyuzhao@hrbeu.edu.cn), 1600, South China University of Technology (33): : 1081 - 1088
- [30] Design of CMOS Dynamic Logic Circuits to Improve Noise Immunity 2017 INTERNATIONAL CONFERENCE ON COMMUNICATION AND SIGNAL PROCESSING (ICCSP), 2017, : 1948 - 1952