Design of the TRIO system-on-chip for aerospace

被引：4
|
作者：
Kottaras, G [1 ]
Sarris, E
Paschalidis, B
Stamatopoulos, N
Paschalidis, N
机构：
[1] Democritus Univ Thrace, Thrace, Greece
[2] Johns Hopkins Univ, Appl Phys Lab, Laurel, MD 20723 USA
来源：
IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS | 2004年 / 40卷 / 03期
基金：
美国国家航空航天局;
关键词：
D O I：
10.1109/TAES.2004.1337460
中图分类号：
V [航空、航天];
学科分类号：
08 ; 0825 ;
摘要：
Several design and testing aspects of the TRIO smart sensor data acquisition chip, developed by JHU/APL for NASA spacecraft applications are presented. TRIO includes a 10 bit self-corrected analog-to-digital converter (ADC), 16/32 analog inputs, a front end multiplexer with selectable aquisition time, a current source, memory, serial and parallel bus, and control logic. So far TRIO is used in many missions including Contour, Messenger, Stereo, Pluto, and the generic JPL X2000 spacecraft bus.
引用
收藏
页码：862 / 878
页数：17
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