System/Network Design-Space Exploration Based on TLM for Networked Embedded Systems

被引:16
|
作者
Bombieri, Nicola [1 ]
Fummi, Franco [1 ]
Quaglia, Davide [1 ]
机构
[1] Univ Verona, Dipartimento Informat, I-37134 Verona, Italy
关键词
Design; Performance; Verification; Transaction level modeling; networked embedded systems;
D O I
10.1145/1721695.1721703
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This article presents amethodology for the design of Networked Embedded Systems (NESs), which extends Transaction Level Modeling (TLM) to perform system/network design-space exploration. As a result, a new design dimension is added to the traditional TLM refinement process to represent network configuration alternatives. Each network configuration can be used to drive both architecture exploration and system validation after each refinement step. A system/network simulation taxonomy is investigated aiming at precisely identifying the role of cosimulation in system/network design-space exploration. Furthermore, a general criterion to map functionalities to system and network models is presented. As a case study, the proposed methodology is applied to the design of a Voice-over-IP client.
引用
收藏
页数:32
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