Effect of Temperature on Performance of HZO-Based FD-SOI NCFET

被引：0

作者：

Seshu, Vullakula Rama ^{[1
]}

Shaik, Rameez Raja ^{[1
]}

Pradhan, K. P. ^{[1
]}

机构：

[1] IIITDM Kancheepuram, Dept ECE, Chennai 600127, Tamil Nadu, India

来源：

2021 JOINT INTERNATIONAL EUROSOI WORKSHOP AND INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (EUROSOI-ULIS) | 2021年

关键词：

FDSOI; g(m); HZO; LK model; MFMIS; NCFET; SS; NEGATIVE-CAPACITANCE;

D O I：

10.1109/EuroSOI-ULIS53016.2021.9560179

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this study, the temperature effect on Zirconium doped HfO2 (HZO) based Metal-Ferroelectric-MetalInsulator-Semiconductor (MFMIS) type Fully depleted Silicon on Insulator (FDSOI) negative capacitance field effect transistor (NCFET) has been investigated in ATLAS TCAD. The MIS device simulation has been performed in TCAD and its gate charge (Q(G)) has been extracted. The extracted charge is further utilized in 1D Landau-Khalatnikov (LK) model to find the voltage across ferro-electric (V-FE), that subsequently used to add the effect of HZO analytically to the device. Performance parameters like minimum sub-threshold swing (min. SS), off current (I-off) and transconductance (g(m)) with variation of temperature (280 K - 340 K with step 20 K) have been predicted. The performance variation of device with temperature has been explained using 1D LK theory.

引用

页数：4

共 50 条

[31] Total Ionizing Dose Effect on Ring Oscillator Frequency in 28-nm FD-SOI Technology
Seo, Dongkyu
Trang, Le Dang
Han, Jin-Woo
Kim, Jinsang
Lee, Seunghyun
Chang, Ik-Joon
IEEE ELECTRON DEVICE LETTERS, 2018, 39 (11) : 1728 - 1731
[32] HCI and NBTI including the Effect of Back-Biasing in Thin-BOX FD-SOI CMOSFETs
Ishigaki, T.
Tsuchiya, R.
Morita, Y.
Yoshimoto, H.
Sugii, N.
Kimura, S.
2010 INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM, 2010, : 1049 - 1052
[33] Low temperature characterization of mobility in advanced FD-SOI n-MOSFETs under interface coupling conditions
Shin, M.
Shi, M.
Mouis, M.
Cros, A.
Josse, E.
Kim, G. -T.
Ghibaudo, G.
2014 15TH INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (ULIS), 2014, : 61 - 64
[34] Investigation of the Low-Temperature Behavior of FD-SOI MOSFETs in the Saturation Regime Using Y and Z Functions
Karsenty, A.
Chelly, A.
ACTIVE AND PASSIVE ELECTRONIC COMPONENTS, 2014, 2014
[35] Performance analysis of multi-VT design solutions in 28nm UTBB FD-SOI technology
Pelloux-Prayer, Bertrand
Blagojevic, Milovan
Haendler, Sebastien
Valentian, Alexandre
Amara, Amara
Flatresse, Philippe
2013 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S), 2013,
[36] Resistive Switching phenomenon in FD-SOI Ω-Gate FETs: Transistor performance recovery and back gate bias influence
Valdivieso, C.
Rodriguez, R.
Crespo-Yepes, A.
Martin-Martinez, J.
Nafria, M.
SOLID-STATE ELECTRONICS, 2025, 225
[37] Common mode control loop for current mode logic-based circuits in FD-SOI technology
Saif, Marco A.
Dessouky, Mohamed
Aboushady, Hassan
2022 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 22), 2022, : 1132 - 1133
[38] Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology
Danger, Jean-Luc
Yashiro, Risa
Graba, Tarik
Mathieu, Yves
Si-Merabet, Abdelmalek
Sakiyama, Kazuo
Miura, Noriyuki
Nagata, Makoto
Guilley, Sylvain
2018 21ST EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD 2018), 2018, : 508 - 515
[39] Boosting RRAM-Based Mixed-Signal Accelerators in FD-SOI Technology for ML Applications
Boni, Andrea
Malena, Francesco
Saccani, Francesco
Amoretti, Michele
Caselli, Michele
IEEE JOURNAL ON EXPLORATORY SOLID-STATE COMPUTATIONAL DEVICES AND CIRCUITS, 2023, 9 (02): : 159 - 167
[40] Local Variations Compensation with DLL-based Body Bias Generator for UTBB FD-SOI technology
Mauricio, Joan
Moll, Francesc
2015 IEEE 13TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 2015,

← 1 2 3 4 5 →