On the design of low-voltage low-power bulk-driven CMOS Current Conveyors

被引:0
|
作者
Khateb, Ahmad [1 ]
Biolek, Dalibor [1 ]
Novacek, Kamil [1 ]
机构
[1] Brno Univ Technol, Dept Microelect, Brno, Czech Republic
关键词
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暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Research in analog integrated circuits has recently gone in the direction of low-voltage (LV), low-power (LP) design, especially in the environment of portable systems where a low supply voltage, given by a single-cell battery, is required. The current-conveyor (CCII) can be considered as the basic circuit block because all the active devices can be made by a suitable connection of one or two CCIIs. In this paper, a new principle of bulk-driven MOS transistors will be used to design a novel LV LP CCII. New possible applications can be expected in some basic analog functions such as filters, impedance simulators and converters, oscillators, etc. The designs were simulated in Cadence using a 0.7 mu m CMOS technology from AMI SEMICONDUCTOR. The novel bulk-driven current conveyor was designed to work with +/- 0.6 V supply voltage only.
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页码:168 / +
页数:2
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