Hardware/software design space exploration for a reconfigurable processor

被引：0
|
作者：
La Rosa, A [1 ]
Lavagno, L [1 ]
Passerone, C [1 ]
机构：
[1] Politecn Torino, Dipartimento Elettron, I-10129 Turin, Italy
来源：
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, PROCEEDINGS | 2003年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper describes an approach to hardware/software design space exploration for reconfigurable processors. The existing compiler tool-chain, because of the user-definable instructions, needs to be extended in order to offer developers an easy way to explore design space. Such extension often is not easy to use for developer that have only a software background, thus ignoring reconfigurable architecture details or hardware logic synthesis on FPGA. Our approach differs from others because it is based on a simple extension on the standard programming model well known to software developers.
引用
收藏
页码：570 / 575
页数：6
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