Cryogenic Characterization of 28-nm FD-SOI Ring Oscillators With Energy Efficiency Optimization

被引:23
|
作者
Bohuslavskyi, H. [1 ]
Barraud, S. [1 ]
Barral, V. [1 ]
Casse, M. [1 ]
Le Guevel, L. [1 ]
Hutin, L. [1 ]
Bertrand, B. [1 ]
Crippa, A. [2 ]
Jehl, X. [2 ]
Pillonnet, G. [1 ]
Jansen, A. G. M. [2 ]
Arnaud, F. [3 ]
Galy, P. [3 ]
Maurand, R. [2 ]
De Franceschi, S. [2 ]
Sanquer, M. [2 ]
Vinet, M. [1 ]
机构
[1] CEA, LETI, Minatec Campus, F-38054 Grenoble, France
[2] Univ Grenoble Alpes, CEA, INAC, PHELIQS, F-38054 Grenoble, France
[3] STMicroelectronics, F-38920 Crolles, France
关键词
28 nm fully depleted silicon-on-insulator (FD-SOI); body biasing; cryogenic electronics; quantum computing; ring oscillator (RO); ultralow power; QUANTUM COMPUTATION; CMOS; SILICON;
D O I
10.1109/TED.2018.2859636
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Extensive electrical characterization of ring oscillators (ROs) made in high-kappa metal gate 28-nm fully depleted silicon-on-insulator technology is presented for a set of temperatures between 296 and 4.3 K. First, delay per stage (tau(P)), static current (I-STAT), and dynamic current (I-DYN) are analyzed for the case of the increase of threshold voltage (V-TH) observed at low temperature. Then, the same analysis is performed by compensating V-TH to a constant, temperature-independent value through forward body biasing (FBB). Energy efficiency optimization is proposed for different supply voltages (V-DD) in order to find an optimal operating point combining both high RO frequencies and low-power dissipation. We show that the Energy-Delay product can be significantly reduced at low temperature by applying an FBB voltage (V-FBB). We demonstrate that outstanding performance of RO in terms of speed (tau(P) = 37 ps) and static current (7nA/stage) can be achieved at 4.3 K with V-DD reduced down to 0.325 V.
引用
收藏
页码:3682 / 3688
页数:7
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