Improved Non-restoring Square Root Algorithm with Dual Path Calculation

This paper focuses on reducing the delay of the non-restoring square root algorithm. Although the non-restoring square root algorithm is faster than the other radix-2 digit recurrent square root algorithms, there are still some possibilities to enhance its performance. To improve its performance, two new approaches are proposed here. For the first proposed approach, a novel method to find a square root bit for every iteration, which hides the total delay of the multiplexer with dual path calculation is presented. Secondly, a new method uses the modified Most Significant Carry (MSC) generator, which determines the sign of each remainder faster than a carry lookahead adder, which reduces the total delay.