A NEW DSP-ORIENTED ALGORITHM FOR CALCULATION OF THE SQUARE ROOT USING A NONLINEAR DIGITAL-FILTER

This paper proposes a new high-speed algorithm to calculate the square root. This algorithm, which can be regarded as calculation of the step response of a kind of nonlinear IIR filter, requires no divisions. Therefore, it is suitable for a VLSI digital signal processor (DSP) which has a high-speed hardware multiplier but does not usually have a high-speed hardware divider. The convergence properties of the algorithm are analyzed and used to develop a practical implementation of the procedure. It is implemented on the commercially available DSP (TM320C25) and is compared with the Newton-Raphson method. The proposed algorithm has two advantages over the Newton-Raphson method: 1) higher speed execution and 2) smaller calculation error.