Dynamic calibration of current-steering DAC

High accuracy Digital to Analog Converters (DACs) are becoming increasingly important as the common used building block in communication systems. With the increasing of the update rate, dynamic performance of such DACs at high frequencies is of particular interest. The dynamic performance is often characterized by the spurious free dynamic range (SFDR) and the SFDR is limited by the spectral harmonics which are attributed by system nonlinearities. In this paper, the dynamic nonlinearity is analyzed and its effect on tile output waveform is discussed. A novel approach is presented to calibrate the dynamic errors. The validity of this approach is demonstrated with a 15-bit current steering DAC. Simulation results show that the approach is robust and the SFDR can be correspondingly significantly improved by using this calibration scheme.