Fast Lane Boundary Recognition by a Parallel Image Processor

被引：0
|
作者：
Premachandra, Chinthaka [1 ]
Gohara, Ryo [2 ]
Kato, Kiyotaka [2 ]
机构：
[1] Shibaura Inst Technolody, Sch Engn, Tokyo 1358548, Japan
[2] Tokyo Univ Sci, Grad Sch Engn, Tokyo 1258585, Japan
来源：
2016 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN, AND CYBERNETICS (SMC) | 2016年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Much past research related to road domain detection has focused on lane detection. Commonly, this is performed by applying edge detection to a road image, then applying a Hough transform to perform straight-line detection. Detected straight lines are then analyzed to extract lane boundaries. However, the Hough transform is calculation intensive, requiring long processing times. This paper applies a parallel processor to image detection and investigates a Hough transform suited to parallel processing to realize faster lane detection.
引用
收藏
页码：947 / 952
页数：6
相关论文
共 50 条
  • [21] DynamicISP: Dynamically Controlled Image Signal Processor for Image Recognition
    Yoshimura, Masakazu
    Otsuka, Junji
    Irie, Atsushi
    Ohashi, Takeshi
    2023 IEEE/CVF INTERNATIONAL CONFERENCE ON COMPUTER VISION (ICCV 2023), 2023, : 12820 - 12830
  • [22] Parallel Lane Detection Network Based on Image Sequence
    Zhu W.
    Ou Q.
    Hong L.
    He D.
    Zhu, Wei (weizhu@zjut.edu.cn), 1600, Science Press (34): : 434 - 445
  • [23] Speech recognition HMM training on reconfigurable parallel processor
    Yun, HK
    Smith, A
    Silverman, H
    5TH ANNUAL IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, 1997, : 242 - 243
  • [24] DESIGN CONCEPTS FOR AN ON-BOARD PARALLEL IMAGE PROCESSOR
    HUSAINABIDI, AS
    PATTERN RECOGNITION, 1973, 5 (01) : 3 - +
  • [25] A parallel camera image signal processor for SIMD architecture
    Seung-Hyun Choi
    Junguk Cho
    Yong-Min Tai
    Seong-Won Lee
    EURASIP Journal on Image and Video Processing, 2016
  • [26] A PARALLEL DIGITAL PROCESSOR SYSTEM FOR PARTICLE IMAGE VELOCIMETRY
    MEINHART, CD
    PRASAD, AK
    ADRIAN, RJ
    MEASUREMENT SCIENCE AND TECHNOLOGY, 1993, 4 (05) : 619 - 626
  • [27] Parallel digital processor system for particle image velocimetry
    Meinhart, C.D.
    Prasad, A.K.
    Adrian, R.J.
    Measurement Science & Technology, 1993, 4 (05): : 619 - 626
  • [28] PARALLEL DIGITAL IMAGE PROCESSOR IMPLEMENTED IN FPGA TECHNOLOGY
    Brylski, Przemyslaw
    Strzelecki, Michal
    SPA 2011: SIGNAL PROCESSING ALGORITHMS, ARCHITECTURES, ARRANGEMENTS, AND APPLICATIONS CONFERENCE PROCEEDINGS, 2011, : 52 - 55
  • [29] FEEDBACK IMAGE MODULATOR FOR A PARALLEL OPTICAL DIGITAL PROCESSOR
    NISENSON, P
    LIPSON, S
    FEINLEIB, J
    JOURNAL OF THE OPTICAL SOCIETY OF AMERICA, 1973, 63 (04) : 505 - 505
  • [30] DESIGN OF PE STRUCTURE OF A PARALLEL IMAGE-PROCESSOR
    OWCZARCZYK, J
    ELECTRONICS LETTERS, 1987, 23 (03) : 121 - 122
12345