System-level power analysis methodology applied to the AMBA AHB bus

被引：0

作者：

Caldari, M ^{[1
]}

Conti, M ^{[1
]}

Coppola, M ^{[1
]}

Crippa, P ^{[1
]}

Orcioni, S ^{[1
]}

Pieralisi, L ^{[1
]}

Turchetti, C ^{[1
]}

机构：

[1] Univ Ancona, I-60131 Ancona, Italy

来源：

DESIGNERS FORUM: DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION | 2003年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The specification on power consumption of a digital system is extremely important due to the growing relevance of the market of portable devices and must be taken into account since the early phases of a complex System-on-Chip design. In this paper some guidelines are provided for the integration of the information on power consumption in the executable model of parameterized cores, with particular attention to the AMBA AHB bus. This will give important information for the analysis and choice between different design architectures driven by functional, timing and power constraints of the System-on-Chip.

引用

页码：32 / 37

页数：6

共 50 条

[41] RAEF: A Power Normalized System-level Reliability Analysis and Estimation Framework
Shafik, Rishad A.
Al-Hashimi, Bashir M.
Mathew, Jimson
Pradhan, Dhiraj
Mohanty, Saraju P.
2012 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI), 2012, : 189 - 194
[42] System-Level Electro-Thermal Analysis of RDS(ON) for Power MOSFET
Murugan, Rajen
Ai, Nathan
Kao, C. T.
2017 THIRTY-THIRD ANNUAL SEMICONDUCTOR THERMAL MEASUREMENT AND MANAGEMENT SYMPOSIUM (SEMI-THERM), 2017, : 52 - 56
[43] A formal framework for modeling and analysis of system-level dynamic power management
Yardi, S
Channakeshava, K
Hsiao, MS
Martin, TL
Ha, DS
2005 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS & PROCESSORS, PROCEEDINGS, 2005, : 119 - 126
[44] System-Level Power Consumption Analysis of the Wearable Asthmatic Wheeze Quantification
Oletic, Dinko
Bilas, Vedran
JOURNAL OF SENSORS, 2018, 2018
[45] Advanced Modeling Techniques for System-level Power Integrity and EMC Analysis
Graziosi, Giovanni
Doriol, Patrice Joubert
Villavicencio, Yamarita
Forzan, Cristiano
Rotigni, Mario
Pandini, Davide
2009 EUROPEAN MICROELECTRONICS AND PACKAGING CONFERENCE (EMPC 2009), VOLS 1 AND 2, 2009, : 52 - +
[46] System-Level Power Estimation Methodology using Cycle-and Bit-Accurate TLM
Grammatikakis, Miltos D.
Politis, Stratos
Schoellkopf, Jean-Pierre
Papadas, Constantine
2011 DESIGN, AUTOMATION & TEST IN EUROPE (DATE), 2011, : 1125 - 1126
[47] An intelligent hybrid methodology of on-line system-level fault diagnosis for nuclear power plant
Peng, Min-jun
Wang, Hang
Chen, Shan-shan
Xia, Geng-lei
Liu, Yong-kuo
Yang, Xu
Ayodeji, Abiodun
NUCLEAR ENGINEERING AND TECHNOLOGY, 2018, 50 (03) : 396 - 410
[48] Predicting System-level Power for a Hybrid Supercomputer
Sirbu, Alina
Bahaoglu, Ozalp
2016 INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING & SIMULATION (HPCS 2016), 2016, : 826 - 833
[49] Comparing system-level power management policies
Lu, YH
De Micheli, G
IEEE DESIGN & TEST OF COMPUTERS, 2001, 18 (02): : 10 - 19
[50] Early Models for System-level Power Estimation
Sunwoo, Dam
Al-Sukhni, Hassan
Holt, Jim
Chiou, Derek
MTV 2007: EIGHTH INTERNATIONAL WORKSHOP ON MICROPROCESSOR TEST AND VERIFICATION, PROCEEDINGS, 2008, : 8 - +

← 1 2 3 4 5 →