GPU-accelerated parallel optimization for sparse regularization

被引：1
|
作者：
Wang, Xingran [1 ]
Liu, Tianyi [1 ]
Minh Trinh-Hoang [1 ]
Pesavento, Marius [1 ]
机构：
[1] Tech Univ Darmstadt, Commun Syst Grp, D-64283 Darmstadt, Germany
来源：
2020 IEEE 11TH SENSOR ARRAY AND MULTICHANNEL SIGNAL PROCESSING WORKSHOP (SAM) | 2020年
关键词：
block successive convex approximation; LASSO; SHRINKAGE;
D O I：
10.1109/sam48682.2020.9104328
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We prove the concept that the block successive convex approximation algorithm can be configured in a flexible manner to adjust for implementations on modern parallel hardware architecture. A shuffle order update scheme and an all-close termination criterion are considered for efficient performance and convergence comparisons. Four different implementations are studied and compared. Simulation results on hardware show the condition of using shuffle order and selection of block numbers and implementations.
引用
收藏
页数：5
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