Phase locked loop robustness improvement using non integer order loop filter

被引：0
|
作者：
Lagareste, V. [1 ]
Badets, F.
Melchior, P.
Begueret, J. B.
Deval, Y.
Oustaloup, A.
Belot, D.
机构：
[1] Univ Bordeaux 1, LAPS Lab, CRONE Team, Bordeaux, France
[2] Univ Bordeaux 1, IXL Lab, RF Design Team, Bordeaux, France
来源：
2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS | 2006年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents how non integer order filters can be used in Phase Locked Loop (PLL) based frequency synthesizers in order to increase their stability robustness. Application to a 192MHz PLL involved in a 3.6GHz multimode double loop frequency synthesizer is described.
引用
收藏
页码：3217 / 3220
页数：4
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