Dual-polarity high voltage generator design for non-volatile memories

被引:0
|
作者
Wang, CC [1 ]
Tseng, YL [1 ]
Chen, TH [1 ]
Hu, R [1 ]
机构
[1] Natl Sun Yat Sen Univ, Dept Elect Engn, Kaohsiung 80424, Taiwan
来源
ICECS 2003: PROCEEDINGS OF THE 2003 10TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3 | 2003年
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A novel voltage generator using 4 clocks with two different phases is presented in this work to provide a high voltage supply required by non-volatile memories during programming mode and erase mode operations. Both the positive and negative polarities of the voltage are generated to serve as the programming voltage and the erase voltage, respectively. The proposed design is carried out by gated pass transistors and switched capacitors. The regulated generated voltages which the proposed design can provide is +11.7 V and -11.6 V given VDD = 2.5 V when the circuit is implemented by TSMC 0.25 mum 1P5M CMOS technology. The maximum power dissipation is estimated to be 3.8 mW given 12.5 MHz clocks.
引用
收藏
页码:248 / 251
页数:4
相关论文
共 50 条
  • [21] The Impact of Device Technologies on the Design of Non-Volatile Content Addressable Memories
    Moon, Sabrina Hassan
    Dutta, Prayash
    Khorrami, Parsa
    Bhanja, Sanjukta
    Reis, Dayane
    2024 IEEE 24TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY, NANO 2024, 2024, : 513 - 516
  • [22] Design of Resistive Non-Volatile Memories for Rad-Hard Applications
    Lupo, Nicola
    Calligaro, Cristiano
    Gastaldi, Roberto
    Wenger, Christian
    Maloberti, Franco
    2016 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2016, : 1594 - 1597
  • [23] A low leakage non-volatile memory voltage pulse generator for RFID applications
    Bucci, Marco
    Luzzi, Raimondo
    Vargas, Santos Torres
    2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS, 2008, : 231 - +
  • [24] Performance Study of Non-volatile Memories on a High-End Supercomputer
    Bautista Gomez, Leonardo
    Keller, Kai
    Unsal, Osman
    HIGH PERFORMANCE COMPUTING, ISC HIGH PERFORMANCE 2018, 2018, 11203 : 145 - 156
  • [25] Channel Coding Methods for Non-Volatile Memories
    Dolecek, Lara
    Sala, Frederic
    FOUNDATIONS AND TRENDS IN COMMUNICATIONS AND INFORMATION THEORY, 2016, 13 (01): : 2 - +
  • [26] Chalcogenide materials and their application to Non-Volatile Memories
    Sousa, Veronique
    MICROELECTRONIC ENGINEERING, 2011, 88 (05) : 807 - 813
  • [27] Test and Reliability of Emerging Non-Volatile Memories
    Hamdioui, Said
    Pouyan, Peyman
    Li, Huawei
    Wang, Ying
    Raychowdhur, Arijit
    Yoon, Insik
    2017 IEEE 26TH ASIAN TEST SYMPOSIUM (ATS), 2017, : 170 - 178
  • [28] High-κ related reliability issues in advanced non-volatile memories
    Larcher, L.
    Padovani, A.
    MICROELECTRONICS RELIABILITY, 2010, 50 (9-11) : 1251 - 1258
  • [29] High-efficiency regulated charge pump for non-volatile memories
    Cabrini, A.
    Fantini, A.
    Torelli, G.
    2006 13TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3, 2006, : 720 - 723
  • [30] Overview of emerging semiconductor non-volatile memories
    Fujisaki, Yoshihisa
    IEICE ELECTRONICS EXPRESS, 2012, 9 (10): : 908 - 925