Electrothermal coupling analysis of current crowding and Joule heating in flip-chip packages

被引：38

作者：

Lai, Yi-Shao ^{[1
]}

Kao, Chin-Li ^{[1
]}

机构：

[1] Adv Semicond Engn Inc, Stress Reliabil Lab, Kaohsiung 811, Taiwan

来源：

MICROELECTRONICS RELIABILITY | 2006年 / 46卷 / 08期

关键词：

D O I：

10.1016/j.microrel.2005.08.009

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Solder bumps serve as electrical paths as well as structural support in a flip-chip package assembly. Owing to the differences of feature sizes and electric resistivities between a solder bump and its adjacent traces, current densities around the regions where traces connect the solder bump increase in a significant amount. This current crowding effect along with the induced Joule heating would accelerate fatigue failure due to electromigration. In this paper we apply the three-dimensional electrothermal coupling analysis to investigate current crowding and Joule heating in a flip-chip package assembly carrying different constant electric currents under different ambient temperatures. Experiments are conducted to calibrate temperature-dependent electric resistivities of solder alloy, Al trace, and Cu trace, and to verify the numerical model by comparing calculated and measured maximum temperatures on the die surface. Through the electrothermal coupling analysis, effects of current crowding and Joule heating induced by different solder bump structures are examined and compared. (c) 2005 Elsevier Ltd. All rights reserved.

引用

页码：1357 / 1368

页数：12

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