A high-fidelity, Web-based simulator for 300mm wafer fabs

被引:0
|
作者
Kim, H [1 ]
Park, J [1 ]
Sohn, S [1 ]
Wang, Y [1 ]
Reveliotis, S [1 ]
Zhou, C [1 ]
Bodner, D [1 ]
McGinnis, L [1 ]
机构
[1] Georgia Inst Technol, Sch Ind & Syst Engn, Atlanta, GA 30332 USA
关键词
high-fidelity simulation; distributed simulation; 300mm wafer fabs; Web-based simulation; rapid prototyping; VRML animation;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Semiconductor fabs are capital intensive. The rate of capital return heavily depends on their productivity. Accordingly, simulation has been adopted in many cases as a viable design and analysis tool to achieve better productivity. However, the gap between the simplistic simulation models and real complex systems has limited the confidence to apply simulation results directly to real systems. Ideally, the simulator should support the rapid modeling and fast execution of high-fidelity fab models in order to be able to provide more realistic simulation results. In this paper, we present our current research effort to develop a high-fidelity web-based simulator for the 300mm wafer fabs. We take a model-view-control approach that allows us to develop modular and reusable fab simulation objects. The proposed approach is implemented as a distributed system that uses a message-based event synchronization mechanism to coordinate the simulation objects as well as to support distributed simulation execution. The presented simulator also provides a high quality VRML animation for visualization of real time paced simulation execution.
引用
收藏
页码:1288 / 1293
页数:6
相关论文
共 50 条
  • [21] 300mm silicon crystal growth and wafer processing
    Tu, HL
    Zhou, QG
    Zhang, GH
    2004: 7TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUITS TECHNOLOGY, VOLS 1- 3, PROCEEDINGS, 2004, : 2353 - 2355
  • [22] Wafer Geometry Technique for Blank 300mm Silicon Wafers
    Trujillo-Sevilla, Juan M.
    Roque-Velasco, Alex
    Jesus Sicilia, Miguel
    Casanova-Gonzalez, Oscar
    Manuel Ramos-Rodriguez, Jose
    Gaudestad, Jan
    2022 33RD ANNUAL SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE (ASMC), 2022,
  • [23] Wafer handling - Factors in determining COO for 300mm FOUPs
    Niebeling, T
    SOLID STATE TECHNOLOGY, 2001, 44 (08) : 48 - 52
  • [24] Development of flash lamp annealing system for 300mm wafer
    Yamashita, K
    Nishimori, H
    Yoshioka, M
    Kusuda, T
    Arikado, T
    Okumura, K
    2003 IEEE INTERNATIONAL SYMPOSIUM ON SEMICONDUCTOR MANUFACTURING, CONFERENCE PROCEEDINGS, 2003, : 153 - 156
  • [25] IC makers maximize 300mm, 200mm wafer capacity
    不详
    SOLID STATE TECHNOLOGY, 2017, 60 (07) : 32 - 32
  • [26] Setting performance targets in a 300mm wafer fabrication facility
    Govind, N
    Fronckowiak, D
    ASCMC 2003: IEEE/SEMI (R) ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE AND WORKSHOP, PROCEEDINGS, 2003, : 75 - 79
  • [27] Defining, designing, and evaluating a -: 300mm test wafer stocker
    Schulz, M
    Jungmann, G
    Orthgiess, E
    Blattner, J
    Wüestrich, B
    SOLID STATE TECHNOLOGY, 2003, 46 (05) : 81 - +
  • [28] Investigations of 300mm wafer tool set progress and performance
    Mautz, K
    PLASMA PROCESSING XIV, 2002, 2002 (17): : 125 - 136
  • [29] Low-cost lithography for 300mm wafer packaging
    Hermanowski, J
    Cullmann, E
    MICROLITHOGRAPHY WORLD, 2004, 13 (02): : 4 - +
  • [30] Doubleside polishing -: a technology mandatory for 300mm wafer manufacturing
    Wenski, G
    Altmann, T
    Winkler, W
    Heier, G
    Hölker, G
    MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING, 2002, 5 (4-5) : 375 - 380