Adaptive power management for the on-chip communication network

被引:0
|
作者
Liang, Guang [1 ]
Jantsch, Axel [2 ]
机构
[1] Univ Amsterdam, Kruislaan 403, Amsterdam, Netherlands
[2] Royal Inst Technol, Stockholm, Sweden
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
An on-chip communication network is most power efficient when it operates just below the saturation point. For any given traffic load the network can be operated in this region by adjusting frequency and voltage. For a deflective routing network we propose the design of a central controller for dynamic frequency and voltage scaling. Given history information including the load and frequency in the network, the controller adjusts the frequency and voltage such that the network operates just below the saturation point. We provide control mechanisms for continuous and discrete frequency ranges. With a discrete frequency range and taking into account voltage switching delays, we evaluate the control mechanism under stochastic, smoothly varying and very bursty traffic. Experiments demonstrate that adaptive control is very effective in minimizing power consumption at reasonable performance. Compared with a fixed high frequency network, the adaptively controlled network is significantly more power efficient. We compare it to fixed frequency networks, which are either too slow exhibiting unbounded delays, or are dimensioned for the worst case with very high frequency and are very power hungry.
引用
收藏
页码:649 / +
页数:2
相关论文
共 50 条
  • [21] On-chip stochastic communication
    Dumitras, T
    Marculescu, R
    EMBEDDED SOFTWARE FOR SOC, 2003, : 373 - 386
  • [22] On-chip stochastic communication
    Dumitras, T
    Marculescu, R
    DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, PROCEEDINGS, 2003, : 790 - 795
  • [23] On-chip PVT Compensation Technology for Adaptive Voltage Scaling Control in Computer Power Management Application
    Jin, Minghao
    Fu, Xiao
    McDonald, Graham
    PROCEEDINGS OF THE 18TH INTERNATIONAL CONFERENCE ON AUTOMATION AND COMPUTING (ICAC 12), 2012, : 26 - 30
  • [24] Genetic Algorithm Based On-Chip Communication Link Reconfiguration for Efficient On-Chip Communication
    Hemalatha, S. Beulah
    Vigneswaran, T.
    2017 INTERNATIONAL CONFERENCE ON ALGORITHMS, METHODOLOGY, MODELS AND APPLICATIONS IN EMERGING TECHNOLOGIES (ICAMMAET), 2017,
  • [25] Peak power control for a QoS capable on-chip network
    Jin, YH
    Kim, EJ
    Yum, KH
    2005 INTERNATIONAL CONFERENCE ON PARALLEL PROCESSSING, PROCEEDINGS, 2005, : 585 - 592
  • [26] Scalable On-Chip Network in Power Constrained Manycore Processors
    Kim, Hanjoon
    Kim, Gwangsun
    Kim, John
    2012 INTERNATIONAL GREEN COMPUTING CONFERENCE (IGCC), 2012,
  • [27] Frequency Domain Analysis of On-Chip Power Distribution Network
    Batra, S.
    Singh, P.
    Kaushik, S.
    Hashmi, M. S.
    2016 20TH INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AND TEST (VDAT), 2016,
  • [28] FlexiBuffer: Reducing Leakage Power in On-Chip Network Routers
    Kim, Gwangsun
    Kim, John
    Yoo, Sungjoo
    PROCEEDINGS OF THE 48TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2011, : 936 - 941
  • [29] Replacing global wires with an on-chip network: A power analysis
    Heo, SM
    Asanovic, K
    ISLPED '05: PROCEEDINGS OF THE 2005 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, 2005, : 369 - 374
  • [30] Core network interface architecture and latency constrained on-chip communication
    Bhojwani, Praveen
    Mahapatra, Rabi N.
    ISQED 2006: PROCEEDINGS OF THE 7TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, 2006, : 358 - +