Thermal aspects of burn-in of high power semiconductor devices

被引:3
|
作者
Hamilton, HE [1 ]
机构
[1] Micro Control Co, Minneapolis, MN 55432 USA
关键词
burn-in; burn-in with test; failure rate acceleration; voltage stress; temperature stress; individual DUT temperature control; high-power devices; board-in boards; BIBs;
D O I
10.1109/ITHERM.2002.1012513
中图分类号
O414.1 [热力学];
学科分类号
摘要
Reliability issues have justified bum-in and other corrective measures from the very beginning of the semiconductor industry. The acceleration in failures due to temperature and voltage extremes is used by the bum-in process to provide more reliable devices. An understanding of the basics of heat flow is necessary to allow proper application of elevated temperatures to the devices. Bum-in systems provide a controlled environment to test semiconductor devices at temperature and voltage extremes. These systems typically contain ovens or environmental chambers with test electronics. A number of thermal issues must be appropriately managed to achieve success. These thermal issues grow more complex as the device power increases. An example is provided of a device mounted on a bum-in board that illustrates thermal resistance measurements and calculations. This example is then extended to illustrate the minimum and maximum die temperatures encountered in a typical test application. This wide temperature spread creates the need for individual temperature control for each device. A number of the most recent advances in high-power bum-in address problems created by increased device power. Techniques using individual thermal control with air-cooled and water-cooled devices are described.
引用
收藏
页码:626 / 634
页数:9
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