Real-time application to multiprocessor-system-on-chip mapping strategy for system-level design tool

被引：3
|
作者：
Jia, Z. J. [1 ]
Bautista, T. [1 ]
Nunez, A. [1 ]
机构：
[1] Univ Las Palmas Gran Canaria, Res Inst Appl Microelect, E-35017 Las Palmas Gran Canaria, Spain
来源：
ELECTRONICS LETTERS | 2009年 / 45卷 / 12期
关键词：
D O I：
10.1049/el.2009.0952
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A new static mapping technique is presented that can be integrated in a system-level design tool for modelling and simulating real-time applications onto an embedded multiprocessor system. The results of preliminary experiments indicate that the proposed two-phase mapping approach can achieve a good trade-off between the efficiency in resource usage and processor load balancing, as well as the minimisation of the inter-processor communication cost.
引用
收藏
页码：613 / 614
页数：2
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