Efficient Bit-Parallel Multipliers in Composite Fields

Hardware implementation of multiplication in finite field GF(2(m)) based on sparse polynomials is found to be advantageous in terms of space-complexity as well as the time-complexity. In order to design multipliers for the composite fields, we have found another permutation polynomial to convert irreducible polynomials into like-trinomials of the forms(x(2)+ x + 1)(m) + (x(2) + x + 1)(n) + 1, (x(2) + x)(m) + (x(2) + x)(n) + 1 and (x(4) + x + 1)(m) + (x(4) + x + 1)(n) + 1. The proposed bit-parallel multiplier over GF(2(4m)) is found to offer a saving of about 33% multiplications and 42.8% additions over the corresponding existing architectures.