A Reconfigurable Architecture for 1-D and 2-D Discrete Wavelet Transform

被引：5

作者：

Sun, Qing ^{[1
]}

Jiang, Jiang ^{[1
]}

Zhu, Yongxin ^{[1
]}

Fu, Yuzhuo ^{[1
]}

机构：

[1] Shanghai Jiao Tong Univ, Sch Microelect, Shanghai 200030, Peoples R China

来源：

2013 IEEE 21ST ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM) | 2013年

关键词：

DWT; reconfigurable; FPGA implementation; pipeline architecture; high flexibility; VLSI ARCHITECTURE;

D O I：

10.1109/FCCM.2013.23

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, we propose a novel architecture for DWT that can be reconfigured to be adapted to different kinds of filter banks and different sizes of inputs. High flexibility and generality are achieved by using the MAC loop based filter(MLBF). Classic methods, such as polyphase structure and fragment-based sample consumption, are used to enhance the parallelism of the system. The architecture can be reconfigured to 3 modes to deal with 1-D or 2-D DWT with different bandwidth and throughput requirements.

引用

页码：81 / 84

页数：4

共 50 条

[21] A scalable pipelined architecture for separable 2-D discrete wavelet transform
Jou, JM
Chen, PY
Shiau, YH
Liang, MS
PROCEEDINGS OF ASP-DAC '99: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 1999, 1999, : 205 - 208
[22] A programmable parallel VLSI architecture for 2-D discrete wavelet transform
Chen, CY
Yang, ZL
Wang, TC
Chen, LG
JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2001, 28 (03): : 151 - 163
[23] A low-latency serial architecture for the 1-D discrete wavelet transform
Breveglieri, L
Piuri, V
Rona, M
Swartzlander, EE
SECOND ANNUAL IEEE INTERNATIONAL CONFERENCE ON INNOVATIVE SYSTEMS IN SILICON, 1997 PROCEEDINGS, 1997, : 300 - 309
[24] Application of 1-D and 2-D discrete wavelet transform to crack identification in statically and dynamically loaded plates
Knitter-Piątkowska A.
Guminiak M.
Engineering Transactions, 2020, 68 (02): : 137 - 157
[25] Fpga implementation of 1-D discrete wavelet transform
Xie, ZG
Yan, GQ
Lv, GZ
Wei, ZS
WAVELET ANALYSIS AND ITS APPLICATIONS (WAA), VOLS 1 AND 2, 2003, : 707 - 712
[26] Parallel architecture for 2-D discrete wavelet transform with low energy consumption
Ishihara, Nozomi
Abe, Koki
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2008, E91A (08) : 2068 - 2075
[27] A parallel architecture for the 2-D discrete wavelet transform with integer lifting scheme
Ferretti, M
Rizzo, D
JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2001, 28 (03): : 165 - 185
[28] An efficient line-based architecture for 2-D discrete wavelet transform
Gao, ZR
Xiong, CY
2005 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS, VOLS 1 AND 2, PROCEEDINGS: VOL 1: COMMUNICATION THEORY AND SYSTEMS, 2005, : 1322 - 1325
[29] Efficient line-based architecture for 2-D discrete wavelet transform
Xiong, Cheng-Yi
Tian, Jin-Wen
Liu, Jian
OPTICAL ENGINEERING, 2006, 45 (03)
[30] A Parallel Architecture for the 2-D Discrete Wavelet Transform with Integer Lifting Scheme
M. Ferretti
D. Rizzo
Journal of VLSI signal processing systems for signal, image and video technology, 2001, 28 : 165 - 185

← 1 2 3 4 5 →