Fast modulo 2n-1 and 2n+1 adder using carry-chain on FPGA

被引：0

作者：

Didier, Laurent-Stephane ^{[1
]}

Jaulmes, Luc ^{[2
]}

机构：

[1] Univ Toulon & Var, Lab IMATH, La Garde, France

[2] Univ Politecn Cataluna, CNS, Barcelona Supercomp Ctr, Barcelona, Spain

来源：

2013 ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS AND COMPUTERS | 2013年

关键词：

Modular adder; carry-chain; FPGA; RNS; 2(n)-1 and 2(n)+1 moduli; MULTIPLICATION; IMPLEMENTATION; DESIGN;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Modular addition is a widely used operation in Residue Number System applications. Specific sets of moduli allow fast RNS operations such as binary conversions and multiplications. Most of them use modulo 2(n) - 1 and 2(n) + 1 additions. This paper presents four fast and small architectures for these specific moduli targeting modern FPGAs with fast carry chains. The use of this arithmetic dedicated feature allows fast and small modular adders. Our modulo 2(n) - 1 adders have a single zero representation. Our modulo 2(n) + 1 adders are designed for binary and diminished-one representation with and without zero value management.

引用

页码：1155 / 1159

页数：5

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