A scaleable, radiation hardened shallow trench isolation

被引:59
|
作者
Brady, FT [1 ]
Maimon, JD [1 ]
Hurt, MJ [1 ]
机构
[1] Lockheed Martin Space Elect & Commun, Manassas, VA 20110 USA
关键词
D O I
10.1109/23.819162
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Shallow Trench Isolation (STI)is rapidly replacing LOCOS (LOCal Oxidation of Silcon) as the device isolation process of choice. However, little work has been done to characterize the radiation-hardness capability of devices built with STI. In this paper, some of the basics of STI devices are examined, such as the radiation response of unhardened STI devices. We discuss several issues affecting the total dose hardness of unhardened STI. These issues have critical implications for the hardness of CMOS built using STI in commercial foundries. Finally, data from hardened STI devices are presented. Total dose hardened STI devices are demonstrated on devices with gate widths down to 0.5 um.
引用
收藏
页码:1836 / 1840
页数:5
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