Polysilicon stepped shallow trench isolation technology for 0.14 μm and beyond

Polysilicon stepped shallow trench isolation (PS-STI) using a Si3N4/Poly-Si/SiO2 stacked mask has been proposed for 0.14 mum and beyond. The PS-STT profile has a poly-Si step length and a protrusion in the trench sidewall after PS-STI etching. The poly-Si is oxidized to form a thin liner oxide, and then a small bird's beak is grown. The PS-STI process has some advantages for ULSI processing. Firstly, the oxide recess at the trench edge is prevented because of partial poly-Si oxidation during the liner oxidation; hence, the subthreshold kink of the shallow trench isolated metal oxide semiconductor field effect transistor (MOSFET) is successfully suppressed. Secondly, because of the increased active area due to the step length oxidation, the reduced contact resistance results in an increased drain current. Also, the PS-STI process successfully suppresses the inverse narrow-width effects and shows excellent time-dependent dielectric. breakdown results for the gate oxide integrity.